DocumentCode :
3152594
Title :
Static Noise Margin Evaluation Method Based on Direct Polynomial-Curve-Fitting with Universal SRAM Cell Inverter TEG Measurement
Author :
Nakamura, Kazuyuki ; Noda, Kazunori ; Koike, Hiroki
Author_Institution :
Center for Microelectron. Syst., Kyushu Inst. of Technol., Iizuka
fYear :
2009
fDate :
March 30 2009-April 2 2009
Firstpage :
9
Lastpage :
12
Abstract :
A new method to evaluate the static noise margin (SNM) for leading-edge CMOS SRAM development is proposed. This method includes: (1) direct measurement of the inverter DC transfer curves using a "universal SRAM cell inverter TEG (USCIT)" with arbitrary transistor ratios, (2) curve-fitting of the measured data to polynomial functions in a 45-degree rotated space, and (3) a database of the polynomial coefficients to evaluate and optimize the SNM by a simple algebraic operation. The SNM values obtained using this method are in good agreement with the measured SRAM operations.
Keywords :
CMOS memory circuits; SRAM chips; curve fitting; integrated circuit noise; integrated circuit testing; invertors; polynomials; TEG measurement; algebraic operation; direct polynomial-curve-fitting; inverter DC transfer curve; leading-edge CMOS SRAM development; static noise margin evaluation method; universal SRAM cell inverter; CMOS technology; Curve fitting; Databases; Inverters; MOSFETs; Noise measurement; Polynomials; Random access memory; Rotation measurement; SPICE;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronic Test Structures, 2009. ICMTS 2009. IEEE International Conference on
Conference_Location :
Oxnard, CA
Print_ISBN :
978-1-4244-4259-1
Type :
conf
DOI :
10.1109/ICMTS.2009.4814599
Filename :
4814599
Link To Document :
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