A back-gate coupling QVCO with Kvco linearization technique

Author

Chiang, Yen-Chung ; Chang, Yu-Hsin

Author_Institution

Dept. of Electr. Eng., Nat. Chung Hsing Univ., Taichung, Taiwan

fYear

2009

fDate

Jan. 9 2009-Dec. 11 2009

Firstpage

108

Lastpage

110

Abstract

A 4.03 GHz-4.97 GHz quadrature voltage-controlled oscillator (QVCO) with back-gate coupling and VCO gain (K_VCO) linearization techniques implemented in 0.35 Â¿m SiGe BiCMOS process technology is presented. The back-gate coupling is adopted to improve the phase noise and to reduce the power consumption, and a voltage-level-shift circuit is used to linearize the VCO gain. The core circuit draws a 5.65 mA current from 3.0 V power supply. The measured phase noise at 1 MHz frequency offset is -102.76 dBc/Hz. And the measured K_VCO is from 456 MHz/V to 744 MHz/V with a K_VCO ratio of 1.63.

Keywords

BiCMOS integrated circuits; Ge-Si alloys; linearisation techniques; voltage-controlled oscillators; BiCMOS process technology; Kvco linearization technique; back-gate coupling QVCO; current 5.65 mA; frequency 4.03 GHz to 4.97 GHz; phase noise; phase noise measurement; power consumption reduction; quadrature voltage-controlled oscillator; size 0.35 mum; voltage 3 V; voltage-level-shift circuit; BiCMOS integrated circuits; Coupling circuits; Frequency measurement; Germanium silicon alloys; Linearization techniques; Noise measurement; Phase measurement; Phase noise; Silicon germanium; Voltage-controlled oscillators; Back-gate coupling; Kvco linearization; QVCO; SiGe BiCMOS;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio-Frequency Integration Technology, 2009. RFIT 2009. IEEE International Symposium on

Conference_Location

Singapore

Print_ISBN

978-1-4244-5031-2

Electronic_ISBN

978-1-4244-5032-9

Type

conf

DOI

10.1109/RFIT.2009.5383720

Filename

5383720