Title :
On the power dissipation in dynamic threshold silicon-on-insulator CMOS inverter
Author :
Jin, Wei ; Chan, Philip C.H. ; Chan, Mansun
Author_Institution :
Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., Kowloon, Hong Kong
Abstract :
The leakage current due to the parasitic PN junction diodes in SOI DTMOS (Dynamic threshold voltage MOSFET) inverter is reported. The additional power dissipation in DTMOS inverter due to the diodes is quantified through an analytical model and verified by MEDICI simulation. Power dissipation between conventional SOI CMOS and SOI DTMOS inverters is compared.
Keywords :
CMOS logic circuits; integrated circuit modelling; leakage currents; logic gates; silicon-on-insulator; MEDICI simulation; SOI DTMOS inverter; analytical model; dynamic threshold SOI CMOS inverter; dynamic threshold voltage MOSFET; leakage current; parasitic p-n junction diodes; power dissipation; Analytical models; Diodes; Inverters; MOSFET circuits; Permission; Power dissipation; Power engineering and energy; Power supplies; Silicon on insulator technology; Subthreshold current;
Conference_Titel :
Low Power Electronics and Design, 1997. Proceedings., 1997 International Symposium on
Conference_Location :
Monterey, CA, USA
Print_ISBN :
0-89791-903-3
