Title :
High-level power estimation of VLSI systems
Author :
Fornaciari, W. ; Gubian, P. ; Sciuto, D. ; Silvano, C.
Author_Institution :
Dipt. di Elettronica, Politecnico di Milano, Italy
Abstract :
The goal of this paper is to present an innovative conceptual framework suitable for achieving accurate and efficient estimation of power dissipation for data-path intensive architectures described at RT and behavioral levels. The aim is to provide the designer with the capability of analyzing different solutions in the architectural design space, before the synthesis tasks. The proposed methodology addresses all the elements composing a typical data-path architecture, such as storage units, functional units and multiplexers. The paper includes experimental results demonstrating the validity of the proposed approach
Keywords :
CMOS digital integrated circuits; VLSI; application specific integrated circuits; integrated circuit design; RT level; VLSI systems; architectural design space; behavioral level; data-path intensive architectures; functional units; high-level power estimation; power dissipation; storage units; Application specific integrated circuits; CMOS technology; Embedded system; Frequency; Integrated circuit synthesis; Multiplexing; Power dissipation; Space exploration; Stochastic processes; Very large scale integration;
Conference_Titel :
Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on
Print_ISBN :
0-7803-3583-X
DOI :
10.1109/ISCAS.1997.621496
