DocumentCode
315690
Title
Design guidelines for CMOS current steering logic
Author
Sáez, R. T L ; Kayal, M. ; Declercq, M. ; Schneider, M.C.
Author_Institution
Electron. Lab., Swiss Fed. Inst. of Technol., Lausanne, Switzerland
Volume
3
fYear
1997
fDate
9-12 Jun 1997
Firstpage
1872
Abstract
Closed-form expressions for static and dynamic parameters have been derived for the Current Steering Logic (CSL) inverter. Measurements and simulation results that validate these expressions are presented for a 2.5 V power supply. Design guidelines are given for the application of CSL gates in low voltage, low power mixed analog/digital circuits
Keywords
CMOS logic circuits; integrated circuit design; logic design; logic gates; mixed analogue-digital integrated circuits; 2.5 V; CMOS current steering logic; CSL gates; CSL inverter; closed-form expressions; design guidelines; dynamic parameters; low power mixed analog/digital circuits; low voltage operation; static parameters; CMOS logic circuits; Circuit simulation; Closed-form solution; Digital circuits; Guidelines; Logic design; Low voltage; Power measurement; Power supplies; Pulse inverters;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on
Print_ISBN
0-7803-3583-X
Type
conf
DOI
10.1109/ISCAS.1997.621514
Filename
621514
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