DocumentCode :
3158739
Title :
Design space exploration of a 2-D DWT system architecture
Author :
Sameen, Ishmael ; Chang, Yoong Choon ; Song, Ng Mow ; Goi, Bok-Min ; Lee, Chee Siong
Author_Institution :
Fac. of Eng., Multimedia Univ., Cyberjaya, Malaysia
fYear :
2010
fDate :
28-30 June 2010
Firstpage :
36
Lastpage :
40
Abstract :
This paper proposes a programmable 2-D DWT system architecture designed for the JPEG-2000 standard. The proposed system architecture, derived from an iterative design space exploration process using Altera´s C2H compiler, provides a significant performance acceleration of 2-D DWT when compared to an optimized 2-D DWT software implementation and is capable of real-time video processing performance up to 720p (1280 × 720) image resolutions when synthesized and tested on an Altera DE3 Stratix III FPGA board.
Keywords :
discrete wavelet transforms; electronic engineering computing; field programmable gate arrays; image coding; image resolution; logic design; program compilers; video signal processing; Altera C2H compiler; Altera DE3 Stratix III FPGA board; JPEG-2000 standard; discrete wavelet transform; image resolution; iterative design space exploration process; programmable 2D DWT system architecture; real-time video processing; Computer architecture; Design optimization; Discrete wavelet transforms; Image resolution; Life estimation; Optimizing compilers; Process design; Real time systems; Software performance; Space exploration; Design Space Exploration; Discrete Wavelet Transform (DWT); Field-Programmable Gate Array (FPGA);
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Cybernetics and Intelligent Systems (CIS), 2010 IEEE Conference on
Conference_Location :
Singapore
Print_ISBN :
978-1-4244-6499-9
Type :
conf
DOI :
10.1109/ICCIS.2010.5518584
Filename :
5518584
Link To Document :
بازگشت