DocumentCode :
3160586
Title :
A novel method for diagnosis of board level interconnect faults using boundary scan
Author :
Kumar, Pankaj ; Sharma, R.K. ; Sharma, D.K. ; Kaushik, B.K.
Author_Institution :
Dept. of Electron. & Commun. Eng., Nat. Inst. of Technol., Kurukshetra, India
fYear :
2010
fDate :
17-19 Sept. 2010
Firstpage :
270
Lastpage :
275
Abstract :
Over the past years complexity of PCB board and the surface mount technology has increased by leaps and bounds. This limits the use of traditional in-circuit test techniques for testing of such boards. This paper addresses the various issues of board level interconnect testing using Boundary Scan architecture. This work implements BIST using Boundary Scan technique. A new Algorithm is developed to diagnose PCB level faults. The dominant-1 (WOR), dominant-0 (WAND) and stuck-at faults are taken up in this paper. The proposed algorithm is also compared with the existing algorithms viz modified counting, walking one´s algorithm and others. Our results are found to be better than the existing algorithms.
Keywords :
boundary scan testing; built-in self test; interconnections; printed circuit accessories; printed circuit testing; BIST; PCB board; board level interconnect faults; board level interconnect testing; boundary scan; dominant-0 WAND; dominant-1 WOR; stuck-at faults; surface mount technology; Circuit faults; Computer architecture; Integrated circuit interconnections; Microprocessors; Registers; Testing; Wires; BIST; Boundary scan; Faults; PCB; TPG;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer and Communication Technology (ICCCT), 2010 International Conference on
Conference_Location :
Allahabad, Uttar Pradesh
Print_ISBN :
978-1-4244-9033-2
Type :
conf
DOI :
10.1109/ICCCT.2010.5640517
Filename :
5640517
Link To Document :
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