Title :
Using complex sequential modules in RTL synthesis
Author :
Chaudhuri, Samit ; Quayle, Michael
Author_Institution :
Cadence Design Syst., Chelmsford, MA, USA
Abstract :
This paper presents a new method that enables our RTL-synthesis tool to use complex sequential modules such as counters, accumulators and shift-registers (CASRs). If the target library contains such modules, the method automatically recognizes them. If the RTL design contains patterns that can be implemented on CASR modules, the method maps them to the CASR modules found in the target library. This method leads to smaller and more regular designs, often with better timing characteristics
Keywords :
application specific integrated circuits; counting circuits; hardware description languages; logic CAD; sequential circuits; shift registers; timing; ASIC; CASR modules; RTL synthesis; accumulators; complex sequential modules; counters; hardware description languages; shift-registers; target library; timing characteristics; Clocks; Counting circuits; Field programmable gate arrays; Hardware design languages; Libraries; Logic design; Pattern recognition; Shift registers; Target recognition; Timing;
Conference_Titel :
ASIC Conference and Exhibit, 1996. Proceedings., Ninth Annual IEEE International
Conference_Location :
Rochester, NY
Print_ISBN :
0-7803-3302-0
DOI :
10.1109/ASIC.1996.551979
