• DocumentCode
    3167461
  • Title

    The package bandwidth limitation of high speed broadband products

  • Author

    Wen, Yenting

  • Author_Institution
    ON Semicond., Phoenix, AZ, USA
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    1457
  • Lastpage
    1462
  • Abstract
    This report investigated the electrical performance of two different bonding techniques such as wire bonding and flip chip bonding, and the performance of two different package families such as Quad Flat-Pack No Lead (QFN) and Plastic Ball Grid Array (PBGA). These two package families have played important roles on the leading edge high performance broadband products used for the blooming networking and computing market. These interconnect models were created in a commercial available. Three Dimensional Electromagnetic solver and the equivalent circuits were exported into SPICE for both time domain and frequency domain circuits analysis. The bandwidth of the Selected package families depends on not only the die size and lead count, but also the package lead pitch. The uniqueness of this study is that the bandwidth of the selected package families has been investigated as a function of their attributes. Several points have been observed. (1) The bandwidth decreases with the increasing lead count in all the packages. (2) The QFN works quite well in low lead count, but its performance rolls off drastically as the lead count increases. (3) The performance of a flip chip PBGA is better than that of a wire bond PBGA, and the flip chip PBGA has more available “Best Pin” than what the wire bond PBGA has. This bandwidth limitation generated in this report can be used as a reference for product group to select a suitable package or for development group to rationalize the technology direction. The analysis techniques used here can be applied to a specific design
  • Keywords
    SPICE; ball grid arrays; equivalent circuits; flip-chip devices; frequency-domain analysis; integrated circuit packaging; lead bonding; plastic packaging; time-domain analysis; Best Pin; Plastic Ball Grid Array; Quad Flat-Pack No Lead; SPICE; die size; electrical characteristics; equivalent circuit; flip-chip bonding; frequency domain circuit analysis; high-speed broadband product; interconnect model; lead count; package bandwidth; three-dimensional electromagnetic simulation; time domain circuit analysis; wire bonding; Bandwidth; Bonding; Computer networks; Electronics packaging; Flip chip; High performance computing; Integrated circuit interconnections; Lead; Plastic packaging; Wire;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference, 2001. Proceedings., 51st
  • Conference_Location
    Orlando, FL
  • ISSN
    0569-5503
  • Print_ISBN
    0-7803-7038-4
  • Type

    conf

  • DOI
    10.1109/ECTC.2001.928028
  • Filename
    928028