DocumentCode
3167476
Title
Fabrication of silicon-on-insulator wafer by SIMOX layer transfer
Author
Wei, Xing ; Zhang, Bo ; Chen, Meng ; Zhang, Miao ; Wang, Xi ; Lin, Chenglu
Author_Institution
State Key Lab. of Functional Mater. for Inf., Chinese Acad. of Sci., Shanghai
fYear
2008
fDate
6-9 Oct. 2008
Firstpage
81
Lastpage
82
Abstract
In summary, an improved process named SIMOX layer transfer is proposed. SOI wafer with the device layer thickness of 147.5plusmn3.1 nm has been fabricated with SLT process. SE result indicates that the device layer has excellent thickness uniformity. The results of TEM show sharp interfaces and defect-free device layer, revealing the perfect structure of SLT SOI.
Keywords
SIMOX; annealing; elemental semiconductors; silicon; transmission electron microscopy; wafer bonding; SIMOX layer transfer; SLT; SLT process; SOI wafer; Si; TEM; annealing; defect-free device layer; silicon-on-insulator wafer; wafer bonding; Annealing; Conference proceedings; Costs; Etching; Fabrication; Informatics; Laboratories; Silicon on insulator technology; Surface morphology; Wafer bonding;
fLanguage
English
Publisher
ieee
Conference_Titel
SOI Conference, 2008. SOI. IEEE International
Conference_Location
New Paltz, NY
ISSN
1078-621X
Print_ISBN
978-1-4244-1954-8
Electronic_ISBN
1078-621X
Type
conf
DOI
10.1109/SOI.2008.4656304
Filename
4656304
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