Title :
Adjusting to 3D devices in a 2D device world
Author :
Harris, H.R. ; Adhikari, H. ; Smith, C.E. ; Smith, G. ; Yang, J.W. ; Majhi, P. ; Jammy, R.
Author_Institution :
Texas A&M Univ., College Station, TX
Abstract :
The challenges of device scaling and short channel effects have necessitated the close examination of 3 dimensional processing. While this certainly comes with challenges in processing and metrology, it also comes with opportunities for new device paradigms and analysis methods. We will look at an historical perspective of 3D processing and further examine how to accurately ldquothinkrdquo 3D to achieve some of these goals and the ramifications of a few interesting device tricks that 3D processing provides.
Keywords :
MOSFET; annealing; doping profiles; silicon-on-insulator; 3D processing; MOSFET; SOI MuGFET; annealing; doping profile; short channel effects; Conference proceedings; Costs; Doping; Etching; FinFETs; History; Jamming; Metrology; Planarization; USA Councils;
Conference_Titel :
SOI Conference, 2008. SOI. IEEE International
Conference_Location :
New Paltz, NY
Print_ISBN :
978-1-4244-1954-8
Electronic_ISBN :
1078-621X
DOI :
10.1109/SOI.2008.4656321