• DocumentCode
    316787
  • Title

    Design of compact and high speed totally self-checking CMOS checkers for m-out-of-n codes

  • Author

    Kavousianis, X. ; Nikolos, D. ; Sidiropoulos, G.

  • Author_Institution
    Dept. of Comput. Eng. & Inf., Patras Univ., Greece
  • fYear
    1997
  • fDate
    20-22 Oct 1997
  • Firstpage
    128
  • Lastpage
    136
  • Abstract
    This paper presents a novel method for designing TSC m-out-of-n code checkers taking into account a realistic fault model including stuck-at, transistor stuck-on, transistor stuck-open, resistive bridging faults and breaks. The proposed design method is the first method in the open literature that takes into account a realistic fault model and can be applied for all practical values of m and n. Apart from the above the proposed checkers are very compact and very fast. Another benefit of the proposed TSC checkers is that all faults are tested by single pattern tests thus the probability of achieving the TSC goal is greater than in checkers requiring two-pattern tests
  • Keywords
    CMOS integrated circuits; built-in self test; error detection codes; integrated circuit design; integrated circuit testing; breaks; design; fault model; m-out-of-n code; resistive bridging faults; single pattern test; stuck-at faults; totally self-checking CMOS checker; transistor stuck-on faults; transistor stuck-open faults; Built-in self-test; CMOS technology; Circuit faults; Computer errors; Design methodology; Electrical fault detection; Fault detection; Semiconductor device modeling; Testing; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Defect and Fault Tolerance in VLSI Systems, 1997. Proceedings., 1997 IEEE International Symposium on
  • Conference_Location
    Paris
  • ISSN
    1550-5774
  • Print_ISBN
    0-8186-8168-3
  • Type

    conf

  • DOI
    10.1109/DFTVS.1997.628318
  • Filename
    628318