Optimizing FinFET geometry and parasitics for RF applications

A detailed analysis about the impact of parasitic capacitances/resistances and fin geometry in FinFETs for RF applications has been presented. RF FinFETs should be designed with T_fin/L_g of 0.6 and AR of 3, along with minimal fin spacing of 50 nm to achieve higher f_T and f_MAX values. Although FinFET will always exhibit higher parasitics than an equivalent planar technology, reduction of R_SD to ITRS target specification, together with a minimal fin spacing S_fin, results in significant improvement in RF figures of merit.