Title :
Small signal model for low power DSP
Author :
Mehta, H. ; Owens, R.M. ; Irwin, M.J.
Author_Institution :
Dept. of Comput. Sci. & Eng., Pennsylvania State Univ., University Park, PA, USA
Abstract :
We describe a technique which reduces power consumption in pipelined DSP circuits by mapping full precision operations to small precision operations, using adaptive delta modulation to reduce the signal size. The discrete cosine transform example is evaluated considering issues such as power, area, delay, latency, accuracy of the system and the sampling frequency of the signal.
Keywords :
delays; delta modulation; digital signal processing chips; discrete cosine transforms; integrated circuit modelling; pipeline processing; signal sampling; adaptive delta modulation; delay; discrete cosine transform; latency; low power DSP; pipelined DSP circuits; power consumption reduction; sampling frequency; small signal model; Adders; Circuits; Delay; Digital signal processing; Frequency; Power system modeling; Pulse power systems; Reactive power; Sampling methods; Signal processing;
Conference_Titel :
Low Power Electronics, 1995., IEEE Symposium on
Conference_Location :
San Jose, CA, USA
Print_ISBN :
0-7803-3036-6
DOI :
10.1109/LPE.1995.482450
