DocumentCode
316902
Title
Current limiting power device based on a 4 layer structure
Author
Godignon, P. ; Jordà, X. ; Millán, J. ; Deshayes, R. ; Sarrus, F. ; de Palma, J.F.
Author_Institution
Centro Nacional de Microelectronica, Bellaterra, Spain
Volume
2
fYear
1997
fDate
5-9 Oct 1997
Firstpage
1236
Abstract
This paper describes the design and simulation of a new current limiting power device. Its structure is based on an n/p/n/p semiconductor device exhibiting a current limitation phenomenon caused by the decrease of the current gain at high current density. Its technological and electrical simulation is performed in one and two dimensions as well as its inclusion in application circuits
Keywords
circuit analysis computing; current density; current limiters; overcurrent protection; p-n heterojunctions; power semiconductor devices; semiconductor device models; current density; current gain; current limitation phenomenon; current limiting power device; design; electrical simulation; n/p/n/p semiconductor device; technological simulation; Circuit simulation; Current density; Current limiters; Electrodes; Equations; Impedance; Protection; Semiconductor devices; Thyristors; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Industry Applications Conference, 1997. Thirty-Second IAS Annual Meeting, IAS '97., Conference Record of the 1997 IEEE
Conference_Location
New Orleans, LA
ISSN
0197-2618
Print_ISBN
0-7803-4067-1
Type
conf
DOI
10.1109/IAS.1997.629017
Filename
629017
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