DocumentCode
3170759
Title
On the relationship between fault-masking and multiple-line redundancies in combinational circuits
Author
Evans, Allison H. ; Macii, Enrico
Author_Institution
Dept. of Comput. Sci., California Univ., San Diego, La Jolla, CA, USA
fYear
1994
fDate
25-28 Sep 1994
Firstpage
633
Abstract
In this paper we present necessary and sufficient conditions for the undetectability of multiple faults in combinational circuits. Then, we study the relationship between fault-masking and multiple-line redundancies
Keywords
combinational circuits; logic testing; redundancy; combinational circuits; fault-masking; multiple faults; multiple-line redundancies; undetectability; Combinational logic circuit testing; Redundancy;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical and Computer Engineering, 1994. Conference Proceedings. 1994 Canadian Conference on
Conference_Location
Halifax, NS
Print_ISBN
0-7803-2416-1
Type
conf
DOI
10.1109/CCECE.1994.405831
Filename
405831
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