DocumentCode
3172149
Title
Effects of gate bias on the threshold voltage of nanoscale double gate MOSFETs
Author
Bhattacherjee, Swagata ; Biswas, Abhijit
Author_Institution
Univ. of Calcutta, Kolkata
fYear
2007
fDate
16-20 Dec. 2007
Firstpage
273
Lastpage
276
Abstract
We have investigated the influence of gate bias voltage, applied to one of the two gates of the dual gate (DG) MOSFET, on the threshold voltage for different geometric dimensions, gate materials and drain to source voltage. In our studies we have employed the 2-D numerical device simulator ATLAS to determine the threshold voltage pertaining to DG MOSFETs. It is observed that the gate bias plays an important role in modifying the threshold voltage of DG MOSFETs and the threshold voltage increases with more negative values of gate bias for n-channel DG MOSFETs.
Keywords
MOSFET; 2D numerical device simulator ATLAS; gate bias voltage; nanoscale double gate MOSFET; threshold voltage; Aluminum; Doping; Electrostatics; MOS devices; MOSFETs; Nanoscale devices; Numerical simulation; Semiconductor process modeling; Size control; Threshold voltage; DG MOSFETs; Nanoscale; gate bias; threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Physics of Semiconductor Devices, 2007. IWPSD 2007. International Workshop on
Conference_Location
Mumbai
Print_ISBN
978-1-4244-1728-5
Electronic_ISBN
978-1-4244-1728-5
Type
conf
DOI
10.1109/IWPSD.2007.4472498
Filename
4472498
Link To Document