DocumentCode
3172357
Title
High level test synthesis across the boundary of behavioral and structural domains
Author
Lai, Kowen ; Papachristou, Christos A. ; Baklashov, Mikhail
Author_Institution
Rockwell Semicond. Syst., Newport Beach, CA, USA
fYear
1997
fDate
12-15 Oct 1997
Firstpage
636
Lastpage
641
Abstract
High level test synthesis (HLTS), a term introduced in recent years, promises automatic enhancement of testability of a circuit. The authors show how HLTS can achieve higher testability for BIST oriented test methodologies. Their results show considering testability during high-level synthesis, better testability can be obtained when compared to DFT at low level. Transformation for testability, which allows behavioral modification for testability, is a very powerful HLTS technique
Keywords
built-in self test; circuit testing; controllability; high level synthesis; logic testing; observability; BIST oriented test methodologies; automatic testability enhancement; behavioral domains; behavioral modification; circuit; high level test synthesis; high-level synthesis; structural domains; transformation for testability; Automatic testing; Built-in self-test; Circuit synthesis; Circuit testing; High level synthesis;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design: VLSI in Computers and Processors, 1997. ICCD '97. Proceedings., 1997 IEEE International Conference on
Conference_Location
Austin, TX
ISSN
1063-6404
Print_ISBN
0-8186-8206-X
Type
conf
DOI
10.1109/ICCD.1997.628932
Filename
628932
Link To Document