DocumentCode
3173303
Title
On-chip transmission line interconnect for Si CMOS LSI
Author
Masu, Kazuya ; Okada, Kenichi ; Ito, Hiroyuki
Author_Institution
Integrated Res. Inst., Tokyo Inst. of Technol., Yokohama, Japan
fYear
2006
fDate
18-20 Jan. 2006
Abstract
Differential transmission line (DTL) interconnect is promising for global signal propagation in multilevel interconnect structure in Si CMOS. Gbps signal transmission through DTL on Si CMOS is discussed. We have also shown that the both delay time and power consumption of DTL global interconnect are become superior to that of the conventional RC global interconnect with repeaters as a technology node progressed, such as in below 90nm technology node.
Keywords
CMOS integrated circuits; elemental semiconductors; integrated circuit interconnections; large scale integration; silicon; transmission lines; CMOS LSI; Si; differential transmission line interconnect; global signal propagation; CMOS technology; Delay effects; Distributed parameter circuits; Energy consumption; Inductance; Integrated circuit interconnections; Large scale integration; Power transmission lines; Repeaters; Transmission lines;
fLanguage
English
Publisher
ieee
Conference_Titel
Silicon Monolithic Integrated Circuits in RF Systems, 2006. Digest of Papers. 2006 Topical Meeting on
Print_ISBN
0-7803-9472-0
Type
conf
DOI
10.1109/SMIC.2005.1587994
Filename
1587994
Link To Document