DocumentCode :
3176177
Title :
Through glass vias (TGV) and aspects of reliability
Author :
Lueck, Matthew ; Huffman, Alan ; Shorey, Aric
Author_Institution :
Electron. & Appl. Phys. Div., RTI Int., Research Triangle Park, NC, USA
fYear :
2015
fDate :
26-29 May 2015
Firstpage :
672
Lastpage :
677
Abstract :
Glass as a substrate for electronics packaging has many potential benefits, including the ability to tailor the thermomechanical and electrical properties of the glass to meet the demands of a given application. Because this process may entail modifications to the chemical composition of the glass, the impact of the composition changes to the long term reliability of the electronic package should be carefully considered. Here, two different compositions of glass are examined with regards to their use as a glass interposer, and specific aspects of their reliability are tested. A glass interposer design was fabricated on glass substrates of two different coefficients of thermal expansion (CTEs), 3 and 8 ppm/°C. This design has 35 × 120 μm through glass vias (TGVs) and front and backside Cu routing metal. The routing metal and TGVs form electrically testable daisy chains. Samples of these glass interposers were subjected to 1000 thermal cycles from - 40 °C to 125 °C to compare the two different glass compositions with regard to their long term reliability. Electrical testing on daisy-chained arrays of 400 TGVs each before and after thermal cycling showed no failures of the structures. In a separate test, Cu interdigitated test structures with 10 μm lines/space were fabricated on glass substrates of the same two types, on silicon with a thermal oxide layer, and also on fused silica. The leakage current between isolated structures was tested before and after 96 hrs of biased highly accelerated stress testing (HAST). The results indicate that for the glass substrate with a CTE of 8 ppm/°C, a barrier layer is necessary between the substrate and Cu metallization to prevent Cu migration.
Keywords :
electronics packaging; glass; metallisation; reliability; chemical composition; electrical properties; electrical testing; electronics packaging; glass interposer design; highly accelerated stress testing; leakage current; metallization; reliability; temperature 40 C to 125 C; thermal expansion coefficients; thermal oxide layer; thermomechanical properties; through glass vias; time 96 h; Glass; Metals; Reliability; Routing; Silicon; Substrates; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Components and Technology Conference (ECTC) , 2015 IEEE 65th
Conference_Location :
San Diego, CA
Type :
conf
DOI :
10.1109/ECTC.2015.7159664
Filename :
7159664
Link To Document :
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