Power-Efficient Fast Write and Hidden Refresh of ReRAM Using an ADC-Based Sense Amplifier

Author

Sang-Yun Kim ; Jong-Min Baek ; Dong-Jin Seo ; Jae-Koo Park ; Jung-Hoon Chun ; Kee-Won Kwon

Author_Institution

Coll. of Inf. & Commun. Eng., Sungkyunkwan Univ., Suwon, South Korea

Volume

60

Issue

11

fYear

2013

fDate

Nov. 2013

Firstpage

776

Lastpage

780

Abstract

An ADC-based current-mode sense amplifier and its usage to improve speed, power efficiency, and reliability of ReRAM are proposed. The adaptive step-size control of incremental step pulse programming enables 2.25 times faster write with 50% power. The degradation of ReRAM cells due to aging can be recovered by hidden refresh without sacrificing system performance. The test circuits are fabricated using a 350-nm technology and integrated with a 1-Kb HfOx array chip.

Keywords

amplifiers; analogue-digital conversion; current-mode circuits; random-access storage; ADC-based current-mode sense amplifier; ADC-based sense amplifier; HfO_x; ReRAM cells; ReRAM power efficiency; ReRAM reliability; ReRAM speed; adaptive step-size control; array chip; hidden refresh; incremental step pulse programming; size 350 nm; storage capacity 1 Kbit; system performance; test circuits; Arrays; Current measurement; Power demand; Programming; Resistance; Sensors; Stress; ADC; ReRAM; fast write; hidden refresh; incremental step pulse programming (ISPP); sense amplifier (SA);

fLanguage

English

Journal_Title

Circuits and Systems II: Express Briefs, IEEE Transactions on

Publisher

ieee

ISSN

1549-7747

Type

jour

DOI

10.1109/TCSII.2013.2281767

Filename

6615953