Fast variational static IR-drop analysis on the graphical processing unit

Due to large power grid sizes, IR-drop analysis is a computationally challenging design flow step that is commonly used in integrated circuit design. Variability in silicon and circuit operating conditions makes IR-drop analysis even more challenging. We introduce a flow to take benefit of a graphical processing unit (GPU). We introduce variability for the power grid elements through Monte Carlo runs. We provide a fair speed comparison with respect to CPU implementation. We observe speed savings up to 5.7× using the GPU implementation without architecture-specific programming effort.