Low temperature solid-state-diffusion bonding for fine-pitch Cu/Sn/Cu interconnect

3D interconnection is one of the key technologies for future´s 3D integration. Cu/Sn/Cu Solid-State-Diffusion (SSD) bonding has been proposed and investigated for fine-pitch interconnection in this paper. Wafer-level bumps, with 20μm-pitch and daisy-chain and Kelvin structures, were pretreated for surface activation and bonded face to face with a wafer bonder. After bonding at 200°C for 1hour, the as-bonded interfacial microstructure is Cu/Cu₃Sn/Cu₆Sn₅/Cu₃Sn/Cu, without pure Sn remained. When the bonded wafers were annealed at 200°C for 30min under N₂ atmosphere, the Cu₆Sn₅ was almost exhausted. And the bonding strength increased from 48MPa to 62MPa. The electrical resistance of the daisy chain including 100 bumps is 11.8Ω, which consisting of redistribution layer and bonding bumps. Additionally, the resistance of the Kelvin structure is 15mΩ.The resistance values are approximate to the theory estimation. Bonding pairs after high temperature storage (HTS) at 150°C for 500hrs were checked for reliability study. Kirkendall voids with various dimensions are discussed for both as-bonded and annealing interfaces. It is concluded that Cu/Sn/Cu SSD bonding would be one of the candidates for fine-pitch interconnect.