DocumentCode :
3179497
Title :
IEEE Std 1241: the benefits and risks of ADC histogram testing
Author :
Max, S.
Author_Institution :
LTX Corp., Westwood, MA, USA
Volume :
1
fYear :
2001
fDate :
21-23 May 2001
Firstpage :
704
Abstract :
The histogram technique for measuring the transition levels, INL, DNL, gain and offset of Analog to Digital Converters has been widely discussed. It is one of the methods recommended by the newly published IEEE Standard 1241. Histogram techniques are susceptible to errors caused by non-monotonic converters. A previously reported technique for correcting for these errors is shown to be fragile. Recommendations are made for properly testing non-monotonic converters. Discussion is included on the effect of alternation and hysteresis on histogram testing
Keywords :
IEEE standards; analogue-digital conversion; gain measurement; graphs; hysteresis; integrated circuit testing; measurement errors; measurement standards; transfer functions; waveform analysis; ADC histogram testing; DNL; IEEE Standard 1241; INL; alternation effect; gain; hysteresis effect; missing codes; nonmonotonic converters; offset; pseudo code; transfer function; transition levels; Analog-digital conversion; Arithmetic; Error correction; Gain measurement; Histograms; Hysteresis; Testing; Transfer functions; USA Councils; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Instrumentation and Measurement Technology Conference, 2001. IMTC 2001. Proceedings of the 18th IEEE
Conference_Location :
Budapest
ISSN :
1091-5281
Print_ISBN :
0-7803-6646-8
Type :
conf
DOI :
10.1109/IMTC.2001.928910
Filename :
928910
Link To Document :
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