Title :
Online heavy hitter detector on FPGA
Author :
Da Tong ; Prasanna, Viktor
Author_Institution :
Ming Hsieh Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA
Abstract :
Detecting heavy hitters is essential for many network management and security applications in the Internet and in data centers. Heavy hitter is the entity in a data stream whose amount of activity, such as bandwidth consumption or number of connections is higher than a given threshold. In this work, we propose a pipelined architecture for an online heavy hitter detector on FPGA. It also reports the top K heavy hitters. We design an application specific data forwarding mechanism to handle data hazards without stalling the pipeline. The stream size and the threshold for heavy hitter detection can be configured through run-time parameters. The post place-and-route results on a state-of-the-art FPGA shows that the architecture can achieve a throughput of 84 Gbps supporting 128 K concurrent flows. The proposed architecture can support large number of concurrent flows using external memory while sustaining the same throughput as the on-chip BRAM based implementation.
Keywords :
Internet; computer centres; computer network management; computer network security; concurrency control; field programmable gate arrays; parallel architectures; pipeline processing; FPGA; Internet; application specific data forwarding mechanism; bandwidth consumption; concurrent flows; data centers; data hazard handling; data stream; network management applications; network security applications; on-chip BRAM based implementation; online heavy hitter detector; pipelined architecture; run-time parameters; Bandwidth; Clocks; Computer architecture; Pipelines; Radiation detectors; Shift registers; Sorting;
Conference_Titel :
Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference on
Conference_Location :
Cancun
Print_ISBN :
978-1-4799-2078-5
DOI :
10.1109/ReConFig.2013.6732297