Title :
A compact, low-cost, and wide-band passive equalizer design using multi-layer PCB parasitics
Author :
Song, Eakhwan ; Kim, Jiseong ; Kim, Joungho ; Cho, Jeonghyeon
Author_Institution :
Dept. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol., Daejeon, South Korea
Abstract :
In this work, we developed a sophisticated low-cost and wide-band passive equalization method for high-speed differential interconnects. The proposed method was based on a high-pass filter design using parasitics that exist in multi-layer printed circuit board (PCB) interconnects. By employing the parasitics as the filter design components, the proposed passive equalization method offered low-cost and wide-band performance in a compact area. A noticeable improvement in the timing jitter and eye-opening using the proposed passive equalizer was demonstrated for a data rate of 20 Gbps.
Keywords :
equalisers; high-pass filters; integrated circuit interconnections; printed circuits; compact passive equalizer design; filter design components; high-pass filter design; high-speed differential interconnects; low-cost passive equalizer design; multilayer PCB parasitics; multilayer printed circuit board interconnects; passive equalization; timing jitter; wide-band passive equalizer design; Capacitance; Equalizers; Impedance; Inductance; Loss measurement; Resistors; Transmission line measurements; Frequency-dependent Loss; Inter-symbol Interference (ISI); Parasitic Inductance; Passive Equalizer; Wideband Equalization;
Conference_Titel :
Electrical Performance of Electronic Packaging and Systems (EPEPS), 2010 IEEE 19th Conference on
Conference_Location :
Austin, TX
Print_ISBN :
978-1-4244-6865-2
Electronic_ISBN :
978-1-4244-6866-9
DOI :
10.1109/EPEPS.2010.5642572