DocumentCode
3192176
Title
A comparative study on dicing of multiple project wafers
Author
Wu, Meng-Chiou ; Lin, Rung-Bin
Author_Institution
Comput. Sci. & Eng., Yuan Ze Univ., Taoyuan County, Taiwan
fYear
2005
fDate
11-12 May 2005
Firstpage
314
Lastpage
315
Abstract
This paper carries out a comparative study on the methods of dicing multi-project wafers (MPW). Our dicing method results in using 40% fewer wafers both for low and high volume production.
Keywords
circuit layout CAD; semiconductor device manufacture; wafer-scale integration; MWP fabrication; multiple project wafer dicing; reticle floorplanning; Computer science; Fabrication; Integer linear programming; Magnetic resonance imaging; Production; Prototypes; Semiconductor device modeling; Textile industry; Vehicles; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI, 2005. Proceedings. IEEE Computer Society Annual Symposium on
Print_ISBN
0-7695-2365-X
Type
conf
DOI
10.1109/ISVLSI.2005.3
Filename
1430170
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