Title :
Computation of Waveform Sensitivity Using Geometric Transforms for SSTA
Author :
Goyal, Ratnakar ; Parameswaran, Harindranath ; Shrivastava, Sachin
Author_Institution :
Cadence Design Syst. (India) Pvt. Ltd., New Delhi
Abstract :
With shrinking process node sizes, the inherent effect of process variations is playing a larger factor in defining the behavior of a circuit and this has resulted in the promotion of statistical static timing analysis (SSTA) as a method for estimating the yield of a circuit in terms of timing activities. The accuracy of SSTA depends on the accuracy of timing sensitivities as computed using a statistical delay calculation (S-DC) engine. The accuracy of the S-DC engine in turn depends on the accuracy and availability of the required information in the timing library. For statistical analysis, these libraries need to contain information on the effect that process variations have on the library timing data. New generation delay calculators also require change in waveform shape (waveform sensitivity) with process variation to be modeled in timing library for better accuracy. Waveform sensitivities are required for accurate computation of gate delay sensitivities for gates driving large interconnect loads or a large number of fanouts. However, modeling waveform sensitivities in the timing library increases the library size significantly (~40% per process parameter). Also in different scenarios the characterization of waveform sensitivities may not be possible. In this paper, we propose a technique for computing waveform sensitivities during analysis when such information is not part of the standard cell library. We use geometric transforms and the nominal waveform information, along with available sensitivities of the timing activities in non-linear delay models to derive waveform sensitivities. We show that using our approach the size of a statistical library with 700 cells is reduced by ~65% as compared to a statistical library with characterized waveform sensitivities. We also show that the computed waveform sensitivities provide an accuracy improvement of 15-20% in the computation of standard deviation.
Keywords :
integrated circuit design; statistical analysis; delay calculators; gate delay sensitivities; geometric transforms; interconnect loads; library timing data; nominal waveform information; nonlinear delay models; process node sizes; process variations; standard cell library; statistical delay calculation engine; statistical static timing analysis; timing library; timing sensitivities; waveform sensitivity; waveform shape; Accuracy; Calculators; Circuits; Engines; Libraries; Propagation delay; Shape; Statistical analysis; Timing; Yield estimation; Accuracy; SSTA; Timing Library;
Conference_Titel :
Quality Electronic Design, 2008. ISQED 2008. 9th International Symposium on
Conference_Location :
San Jose, CA
Print_ISBN :
978-0-7695-3117-5
DOI :
10.1109/ISQED.2008.4479760