DocumentCode :
3193095
Title :
Minimum Shield Insertion on Full-Chip RLC Crosstalk Budgeting Routing
Author :
Hung, Peng-Yang ; Lou, Ying-Shu ; Li, Yih-Lang
Author_Institution :
Nat. Chiao Tung Univ., Hsinchu
fYear :
2008
fDate :
17-19 March 2008
Firstpage :
514
Lastpage :
519
Abstract :
This work presents a full-chip RLC crosstalk budgeting routing flow to generate a high-quality routing design under stringent crosstalk constraints. Based on the cost function addressing the sensitive nets in visited global cells for each net, global routing can lower routing congestion as well as coupling effect. Crosstalk-driven track routing minimizes capacitive coupling effects, and decreases inductive coupling effects by avoiding placing sensitive nets on adjacent tracks. To achieve inductive crosstalk budgeting optimization, the shield insertion problem can be solved with a minimum column covering algorithm, which is undertaken following track routing to process nets with an excess of inductive crosstalk. The proposed routing flow method can identify the required number of shields more accurately, and process more complex routing problems, than the linear programming (LP) methods. Results of this study demonstrate that the proposed approach can effectively and quickly lower inductive crosstalk by up to one-third.
Keywords :
RLC circuits; integrated circuit design; linear programming; network routing; capacitive coupling effects; cost function; crosstalk-driven track routing; full-chip RLC crosstalk budgeting routing; global routing; high-quality routing design; inductive coupling effects; inductive crosstalk budgeting optimization; linear programming methods; minimum column covering algorithm; minimum shield insertion; routing congestion; routing flow method; stringent crosstalk constraints; visited global cells; Computer science; Cost function; Coupling circuits; Crosstalk; Integrated circuit interconnections; Linear programming; Optimization methods; RLC circuits; Routing; Runtime; Shield insertion; crosstalk optimization; global routing; track routing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Quality Electronic Design, 2008. ISQED 2008. 9th International Symposium on
Conference_Location :
San Jose, CA
Print_ISBN :
978-0-7695-3117-5
Type :
conf
DOI :
10.1109/ISQED.2008.4479788
Filename :
4479788
Link To Document :
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