Title :
Some improvements on multipartite table methods
Author :
De Dinechin, Florent ; Tisserand, Arnaud
Author_Institution :
Ecole Normale Superieure de Lyon, France
Abstract :
This paper presents an unified view of most previous table-lookup-and-addition methods: bipartite tables, SBTM, STAM and multipartite methods. This new definition allows a more accurate computation of the error entailed by these methods. Being more general, it also allows an exhaustive design space exploration which has been implemented, and leads to tables smaller than previously published ones by up to 50%. Some results have been synthesised for Virtex FPGAs, and are discussed
Keywords :
digital arithmetic; error analysis; table lookup; SBTM; STAM; Virtex FPGAs; bipartite tables; design space exploration; error; multipartite table methods; table-lookup-and-addition methods; Cost function; Degradation; Field programmable gate arrays; Hardware; Iterative algorithms; Iterative methods; Polynomials; Quantization; Signal processing; Space exploration;
Conference_Titel :
Computer Arithmetic, 2001. Proceedings. 15th IEEE Symposium on
Conference_Location :
Vail, CO
Print_ISBN :
0-7695-1150-3
DOI :
10.1109/ARITH.2001.930112
