• DocumentCode
    3198258
  • Title

    A reconfigurable beamformer for audio applications

  • Author

    Theodoropoulos, Dimitris ; Kuzmanov, Georgi ; Gaydadjiev, Georgi

  • Author_Institution
    Comput. Eng. Lab., Tech. Univ. Delft, Delft, Netherlands
  • fYear
    2009
  • fDate
    27-28 July 2009
  • Firstpage
    80
  • Lastpage
    87
  • Abstract
    Beamforming is a signal processing technique that improves the signal strength received from a specific location. It is already used for many decades in telecommunications, while over the last years, it has been adopted by the audio research society, mostly to enhance speech recognition. In this paper, we propose a scalable organization for a hardware time-invariant beamformer that can be used in small handheld devices and complete 3D-audio systems. Our design can be configured according to the number of input channels. Furthermore, all critical internal modules, such as decimators, FIR filters and interpolators can be adjusted to support various input sampling rates. We developed a hardware prototype in VHDL targeting the Xilinx ML410 board incorporating Virtex4 FX60 FPGA. Following a constrained approach regarding FPGA resource utilization, our hardware prototype occupies 21% of the aforementioned FPGA when instantiating 16 beamforming modules, and consumes approximately 2 Watts of power. Furthermore, our design achieves a speedup of 28 compared to an OMP-annotated software implementation running on a Pentium D at 3.4 GHz. We also compared our design against prior related work. Results suggest that it can extract an audio source up to 11 times faster compared to a reconfigurable adaptive beamformer, and up to 19 times faster compared to DSP implementations.
  • Keywords
    array signal processing; audio signal processing; field programmable gate arrays; hardware description languages; speech recognition; VHDL; Virtex4 FX60 FPGA; Xilinx ML410 board; audio applications; hardware time-invariant beamformer; reconfigurable beamformer; resource utilization; signal processing; speech recognition; Array signal processing; Field programmable gate arrays; Finite impulse response filter; Handheld computers; Hardware; Prototypes; Resource management; Sampling methods; Signal processing; Speech recognition;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Application Specific Processors, 2009. SASP '09. IEEE 7th Symposium on
  • Conference_Location
    San Francisco, CA
  • Print_ISBN
    978-1-4244-4939-2
  • Electronic_ISBN
    978-1-4244-4938-5
  • Type

    conf

  • DOI
    10.1109/SASP.2009.5226341
  • Filename
    5226341