Current density simulations for polymer cored CSP interconnects

Polymer cored spheres have been proposed as a more flexible and therefore more reliable alternative to solid solder balls for use in ball grid array (BGA) and chip scale package (CSP) interconnects. However the use of such polymer cored interconnects will result in a significant increase in the average current density within the individual interconnects, due to the much smaller cross sectional area of metal through which conduction may take place. High current densities in metals are well known to lead to electro-migration and this may lead to reductions in their mechanical performance. The soft solders used in electronics manufacturing operate at high homologous temperatures and are therefore particularly vulnerable to electro-migration damage, particularly as miniaturization also leads to increasing current densities. This paper presents results of electrical current density simulations for geometries typical of a polymer cored sphere based CSP interconnect, in comparison with a conventional solder ball based CSP interconnect, and explores the electrical stress raising effects of the presence of tracks feeding into the solder pads on the allowable maximum current before electro-migration becomes a risk. The results show that for a structure where there are no tracks, i.e. for a via in pad design, the allowable current for a polymer cored interconnect may be only half that for a solid solder ball, but where there are surface tracks the polymer cored interconnects may result in a significantly lower stress concentration effect and therefore allow a higher current than for a solder ball.