• DocumentCode
    3200317
  • Title

    Thermal optimisation of GaN flip chip power transistors

  • Author

    Zhytnytska, R. ; Hilt, O. ; Sidorov, V. ; Würfl, J. ; Tränkle, G.

  • Author_Institution
    FBH Berlin, Berlin, Germany
  • fYear
    2010
  • fDate
    13-16 Sept. 2010
  • Firstpage
    1
  • Lastpage
    3
  • Abstract
    This paper demonstrates thermally optimized flip-chip designs for high power GaN-based normally-off transistors laterally scaled in two dimensions and suitable for high current loads and a breakdown voltage of 250 V. An adapted transistor layout takes the heat spreading capability of the SiC substrate into account and provides an efficient heat sinking via the bumps.
  • Keywords
    III-V semiconductors; flip-chip devices; gallium compounds; heat sinks; power HEMT; silicon compounds; GaN; HEMT device; SiC; adapted transistor layout; breakdown voltage; flip chip power transistor; heat sinking; heat spreading capability; normally-off transistor; substrate; thermal optimisation; voltage 250 V; Gallium nitride; Substrates; Temperature distribution; Thermal resistance; Transistors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic System-Integration Technology Conference (ESTC), 2010 3rd
  • Conference_Location
    Berlin
  • Print_ISBN
    978-1-4244-8553-6
  • Electronic_ISBN
    978-1-4244-8554-3
  • Type

    conf

  • DOI
    10.1109/ESTC.2010.5643000
  • Filename
    5643000