• DocumentCode
    3202407
  • Title

    Optimal design of a two-winding inductor bouncer circuit

  • Author

    Bortis, D. ; Biela, J. ; Kolar, J.W.

  • Author_Institution
    Power Electron. Syst. Lab., ETH Zurich, Zurich, Switzerland
  • fYear
    2009
  • fDate
    June 28 2009-July 2 2009
  • Firstpage
    1390
  • Lastpage
    1395
  • Abstract
    In many pulsed power applications the flatness of the output pulse is an important characteristic to enable proper system operation, whereas a pulse flatness within less than a few percent has to be achieved. In power modulators based on capacitor discharge this voltage droop is mainly defined by the input capacitance. In order to overcome this problem, in power modulators systems, compensation circuits are added, whereby in spite of a smaller storage capacitor a flat pulse top is achieved. Depending on the pulse duration, different approaches for voltage droop compensation exist. For short pulse durations, in the range of several ¿s, only passive solutions or bouncer circuits are applicable. In this paper the design and optimization of a two-winding inductor bouncer circuit is presented in order to achieve an output voltage droop of less than 1%. Due to the realized galvanic isolation a new degree of freedom is obtained, which allows an adaption of the bouncer circuit´s voltage and current rating to standard semiconductor switches. With an optimal design of the two-winding inductor bouncer circuit for the existing system, the volume of the input capacitor is reduced by a factor of 10.5 and the stored energy is decreased by a factor of 24 compared to system without bouncer circuit.
  • Keywords
    power capacitors; power inductors; power semiconductor switches; pulsed power supplies; pulsed power switches; windings; capacitor discharge; compensation circuits; galvanic isolation; output voltage droop; power modulators; pulsed power applications; semiconductor switches; short pulse durations; two-winding inductor bouncer circuit; Capacitance; Capacitors; Design optimization; Galvanizing; Inductors; Pulse circuits; Pulse modulation; Switches; Switching circuits; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Pulsed Power Conference, 2009. PPC '09. IEEE
  • Conference_Location
    Washington, DC
  • Print_ISBN
    978-1-4244-4064-1
  • Electronic_ISBN
    978-1-4244-4065-8
  • Type

    conf

  • DOI
    10.1109/PPC.2009.5386224
  • Filename
    5386224