On a high-speed Reed-Solomon Codec architecture for 43 Gb/s optical transmission systems

Modern high-speed optical transmission systems rely heavily on forward error control (FEC) codes to provide quasi error-free transmission over optical channels. The ITU recommendations G.709 and G.975 that underly current optical systems prescribe the use of an FEC code of length 32640 that consists of 16 interleaved 8-error correcting [255,239] Reed-Solomon (RS) codes with 8-bit symbols. The objective is to replace this standard FEC code by a powerful RS code. An obvious candidate is a single 85-error correcting [2720,2550] RS code of length 32 640 with 12-bit symbols, that is shown to have superior random and burst error correction capabilities and to achieve a 2 dB gain relative to the standard FEC code. To implement such a code, a general high-speed parallelized and pipelined encoder and decoder (codec) architecture is developed. It is then shown that the [2720,2550] RS encoder and decoder can be realized in 0.18 μm CMOS technology at 1.8 V for a 43 Gb/s optical transmission system with 475 k gates and 1.6 M gates, respectively. The proposed [2720,2550] RS code thus proves to be a good candidate to replace the standard FEC code.