DocumentCode
3203746
Title
Parallel implementation of the auction algorithm on the Intel hypercube
Author
Bagherzadeh, Nader ; Hawk, Kent
Author_Institution
Dept of Electr. & Comput. Eng., California Univ., Irvine, CA, USA
fYear
1992
fDate
23-26 Mar 1992
Firstpage
443
Lastpage
447
Abstract
The authors present their experience in executing the auction algorithm on an iPSC/860 hypercube multiprocessor. They show the performance of the algorithm under synchronous and asynchronous computation models. In order to reduce the number of iterations for this algorithm and effectively increase the inherent parallelism in the auction algorithm, they propose and test a new technique called γ-scaling
Keywords
hypercube networks; mathematics computing; operations research; optimisation; parallel algorithms; γ-scaling; Intel hypercube; algorithm performance; asynchronous computation models; auction algorithm; gamma scaling; iPSC/860 hypercube multiprocessor; parallel algorithm; synchronous computation models; Computational modeling; Hypercubes; Operations research; Parallel machines; Parallel processing; Radar applications; Radar tracking; Target tracking; Terminology; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel Processing Symposium, 1992. Proceedings., Sixth International
Conference_Location
Beverly Hills, CA
Print_ISBN
0-8186-2672-0
Type
conf
DOI
10.1109/IPPS.1992.223005
Filename
223005
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