DocumentCode
3205095
Title
On-chip HBD sensor for nanoscale CMOS technology
Author
Lee, Ho Joon ; Kim, Yong-Bin ; Kim, Kyung Ki
Author_Institution
Dept. of Electr. & Comput. Eng., Northeastern Univ., Boston, MA, USA
fYear
2012
fDate
5-8 Aug. 2012
Firstpage
434
Lastpage
437
Abstract
As CMOS technology is scaled down more aggressively; the reliability mechanism (or aging effect) caused by progressive gate oxide breakdown (also called time dependent dielectric breakdown (TDDB)) has become a major reliability concern. The oxide breakdown is categorized into hard breakdown (HBD) and soft breakdown (SBD). With the present of HBD and SBD, it is difficult to control the ON current of the MOSFET device. Especially, HBD causes a catastrophic failure of the device and the entire circuits. In this paper, the TDDB effects on the delay and power of the nanoscale CMOS circuits are analyzed using ISCAS85 benchmark circuits, which are designed using a 45-nm CMOS predictive technology model. Based on the TDDB analysis, a new hard breakdown monitoring circuit has been proposed.
Keywords
CMOS integrated circuits; MOSFET; electric breakdown; electric current control; failure analysis; integrated circuit reliability; CMOS predictive technology model; ISCAS85 benchmark circuits; MOSFET device; SBD; TDDB effects; device catastrophic failure; hard breakdown monitoring circuit; nanoscale CMOS circuits; on current control; on-chip HBD sensor; progressive gate oxide breakdown; reliability mechanism; size 45 nm; soft breakdown; time dependent dielectric breakdown; Delay; Electric breakdown; Integrated circuit modeling; Inverters; Logic gates; Resistors; Ring oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (MWSCAS), 2012 IEEE 55th International Midwest Symposium on
Conference_Location
Boise, ID
ISSN
1548-3746
Print_ISBN
978-1-4673-2526-4
Electronic_ISBN
1548-3746
Type
conf
DOI
10.1109/MWSCAS.2012.6292050
Filename
6292050
Link To Document