SISLOC project: Hardware-based speaker verification system

This paper presents the SISLOC project. This project aims at developing a FPGA-based speaker verification system that is able to authenticate a personpsilas identity by analyzing speech samples. The hardware implementation of a system like that provides many advantages, when compared with a software counterpart: better scalability, lower final cost and possibility of reconfiguration, among others. Once this project aims at developing a commercial product, complexity, development time and performance are part of the project restrictions. This paper shows the main goals and milestones of the project, the objective-oriented strategic decisions and the proposed hardware architecture.