• DocumentCode
    3207825
  • Title

    A 6-Bit 1GS/s asynchronous binary search ADC with 2 bit flash quantizers

  • Author

    Mesgarani, Ali ; Ay, Suat U.

  • Author_Institution
    Electr. & Comput. Eng., Univ. of Idaho, Moscow, ID, USA
  • fYear
    2012
  • fDate
    5-8 Aug. 2012
  • Firstpage
    1008
  • Lastpage
    1011
  • Abstract
    This paper presents a new asynchronous binary search analog to digital converter (ADC). Proposed asynchronous binary search ADC enables higher speed operation of binary search algorithm by resolving two bits in each step. Using two bit flash quantizers in each stage of the proposed binary search ADC the conversion speed improves by two times compared with conventional binary search ADC architectures. New sampling scheme and dynamic offset cancellation technique for the comparator have been adapted to realize a low power and high speed converter. The proposed single channel 6-bit 1GS/s ADC was designed in 65nm CMOS process. Simulation results show that the ADC reaches a peak SNDR of 36.12dB consuming 1.35mW from a single 1.2V power supply. It achieves of 29fJ/conv.code FoM.
  • Keywords
    analogue-digital conversion; CMOS process; asynchronous binary search ADC; asynchronous binary search analog to digital converter; binary search ADC architecture; binary search algorithm; comparator; power 1.35 mW; size 65 nm; two bit flash quantizer; voltage 1.2 V; word length 6 bit; Analog-digital conversion; CMOS process; Calibration; Clocks; Delay; Power demand; Simulation;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems (MWSCAS), 2012 IEEE 55th International Midwest Symposium on
  • Conference_Location
    Boise, ID
  • ISSN
    1548-3746
  • Print_ISBN
    978-1-4673-2526-4
  • Electronic_ISBN
    1548-3746
  • Type

    conf

  • DOI
    10.1109/MWSCAS.2012.6292193
  • Filename
    6292193