Title :
Low power current mode ramp ADC for multi-frequency cell impedance measurement
Author :
Gu, Jinlong ; McFarlane, Nicole
Author_Institution :
Electr. Eng. & Comput. Sci., Univ. of Tennessee, Knoxville, TN, USA
Abstract :
We show the design of a current mode ramp analog to digital converter (ADC) in standard 0.13 μm, 1 poly, 8 metal CMOS process. The ADC is a low-power and area-saving solution for multi-frequency cell impedance measurement. It uses two-step conversion to boost the conversion time by a factor of 32, while keeping a constant practical clock frequency. The ramp ADC samples current signals at different frequencies and converts them into digital signals simultaneously. The main blocks of the ADC are current-mode ramp generator, current comparator, a delay locked loop (DLL) and a gray-code counter.
Keywords :
CMOS digital integrated circuits; analogue-digital conversion; delay lock loops; electric impedance measurement; low-power electronics; CMOS process; DLL; area-saving solution; constant practical clock frequency; current-mode ramp generator; delay locked loop; digital signals; gray-code counter; low power current mode ramp ADC; low power current mode ramp analog to digital converter; multifrequency cell impedance measurement; size 0.13 mum; two-step conversion; Capacitors; Clocks; Generators; Impedance; Inverters; Radiation detectors; Silicon; area efficient; current-mode; delay lock loop; low power; multi-channel; multi-frequency; ramp ADC; silicon cochlea;
Conference_Titel :
Circuits and Systems (MWSCAS), 2012 IEEE 55th International Midwest Symposium on
Conference_Location :
Boise, ID
Print_ISBN :
978-1-4673-2526-4
Electronic_ISBN :
1548-3746
DOI :
10.1109/MWSCAS.2012.6292195
