• DocumentCode
    320828
  • Title

    Hierarchical top-down design of analog sensor interfaces: from system-level specifications down to silicon

  • Author

    Vandenbussche, J. ; Donnay, S. ; Leyn, F. ; Gielen, G. ; Sansen, W.

  • Author_Institution
    ESAT, Katholieke Univ., Leuven, Heverlee, Belgium
  • fYear
    1998
  • fDate
    23-26 Feb 1998
  • Firstpage
    716
  • Lastpage
    720
  • Abstract
    The complete application of a hierarchical top-down design methodology to analog sensor interface front-ends is presented: from system-level specifications down to implementation in silicon, including high-level synthesis, analog block generation and layout generation. A new approach for implementing accurate and fast estimators for the different blocks in the architecture is described. These estimators provide the essential link between the high-level synthesis and the block generation in our hierarchical top-down methodology. The methodology is illustrated by means of the design of a complex and realistic example. Measurement results are included
  • Keywords
    analogue integrated circuits; application specific integrated circuits; circuit layout CAD; high level synthesis; integrated circuit design; ASIC; analog block generation; analog sensor interfaces; circuit CAD; hierarchical top-down design; high-level synthesis; layout generation; system-level specifications; Application specific integrated circuits; Circuit simulation; Design methodology; High level synthesis; Nuclear power generation; Productivity; Radiation detectors; Semiconductor device measurement; Sensor systems; Silicon;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation and Test in Europe, 1998., Proceedings
  • Conference_Location
    Paris
  • Print_ISBN
    0-8186-8359-7
  • Type

    conf

  • DOI
    10.1109/DATE.1998.655937
  • Filename
    655937