A synthesis procedure for flexible logic functions

In most applications of digital logic circuits, the circuit function is either specified (0,1) or unspecified (don´t - care) for every input condition. However, there are also applications where any one of a subset of functions is an acceptable solution, even though it is not possible to represent all the functions in terms of output don´t-cares. In this case, we say that the function is flexible. In this work, we propose a synthesis procedure for flexible functions based on functional blocks called comparison units