Synthesis of autonomous TPG circuits oriented for two-pattern testing

Author

FURUYA, KIYOSHI ; Seki, Seiji ; McCluskey, Edward J.

Author_Institution

Dept. of Inf. & Syst. Eng., Chuo Univ., Tokyo, Japan

fYear

1992

fDate

26-27 Nov 1992

Firstpage

235

Lastpage

240

Abstract

A method to design one-dimensional cellular arrays for use as TPG circuits is described. The interconnections between cells are not limited to adjacent ones but allowed to some neighbors. Completely regular structures that have full-transition coverages for every k -dimensional subspace of state variables are first shown. Then, almost regular arrays which can operate on maximal cycles are derived based on fast parallel implementations of LFSRs

Keywords

built-in self test; cellular arrays; logic design; logic testing; sequential circuits; shift registers; autonomous TPG circuits; full-transition coverages; interconnections; k-dimensional subspace; linear feedback shift registers; one-dimensional cellular arrays; parallel implementations; pseudo-random pattern generation; regular structures; two-pattern testing; Boundary conditions; Built-in self-test; Circuit synthesis; Circuit testing; Content addressable storage; Design methodology; Integrated circuit interconnections; Logic testing; Polynomials; Test pattern generators;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Symposium, 1992. (ATS '92), Proceedings., First Asian (Cat. No.TH0458-0)

Conference_Location

Hiroshima

Print_ISBN

0-8186-2985-1

Type

conf

DOI

10.1109/ATS.1992.224402

Filename

224402