Title :
The Influence of Defect Distribution Function Parameters on Test Patterns Generation
Author :
Rakowski, M. ; Pleskacz, W.A. ; Borkowski, P.
Author_Institution :
Warsaw Univ. of Technol., Warsaw
Abstract :
This paper describes the analysis of influence of yield loss model parameters on the test patterns generation. The probability of shorts between conducting paths as well as the estimations of yield loss are presented on the example gates from industrial standard cell library in 0.8 mum CMOS technology.
Keywords :
CMOS integrated circuits; integrated circuit testing; CMOS technology; defect distribution function parameters; size 0.8 mum; test patterns generation; yield loss model parameters; CMOS technology; Circuit faults; Circuit testing; Distribution functions; Pattern analysis; Probability; Semiconductor device modeling; Software libraries; Test pattern generators; Yield estimation; Critical area; Probability of defect occurrence; Spot defect; Yield model parameters;
Conference_Titel :
Mixed Design of Integrated Circuits and Systems, 2007. MIXDES '07. 14th International Conference on
Conference_Location :
Ciechocinek
Print_ISBN :
83-922632-9-4
Electronic_ISBN :
83-922632-9-4
DOI :
10.1109/MIXDES.2007.4286222