SystemC HW/SW co-design methodology applied to the design of an elliptic curve crypto system on chip

Today, designs of electronic systems are driven by application-specific embedded systems and system-on-chip (SoC). Designing these systems with conventional RTL-centric approach takes extremely long simulation cycles and painful verification process. The trend now is to describe these systems at a higher level of design abstraction. In this paper, we present a SystemC-based hardware/software (HW/SW) co-design and co-simulation environment that allows design space exploration to be conducted early at higher levels of abstraction. It aims to help a designer to obtain an appropriate HW/SW partitioning that satisfies specified area-speed design tradeoffs. A case study of a SoC implementing an Elliptic Curve Cryptographic (ECC) scheme is presented to illustrate the design flow and the design refinements from UML specification model to the final implementation model targetted for Altera Nios FPGA-based hardware development system.