DocumentCode :
3216707
Title :
High-speed cascode sensing scheme for 1.0 V contact-programming mask ROM
Author :
Sasagawa, R. ; Fukushi, I. ; Hamaminato, M. ; Kawashima, S.
Author_Institution :
Fujitsu Labs. Ltd., Kawasaki, Japan
fYear :
1999
fDate :
17-19 June 1999
Firstpage :
95
Lastpage :
96
Abstract :
This paper proposes a high-speed single end sensing scheme. A low-voltage contact-programming mask ROM was designed which utilizes a cascode sense amplifier (S/A). A dummy S/A controls the bit-line pre-charging period to operate the read S/A quickly in spite of high programmed-data-dependence of the bit-line capacitance. The word-line has branches to enhance the cell current with little increase in area. A demonstrated 4 K/spl times/8 bit ROM operates with an access time of 5.7 ns and power of 2.2 mW at 1.0 V, 100 MHz, and 25/spl deg/C.
Keywords :
CMOS memory circuits; high-speed integrated circuits; low-power electronics; read-only storage; 1 V; 100 MHz; 2.2 mW; 25 C; 32 Kbit; 5.7 ns; bit-line capacitance; bit-line pre-charging period; cascode sense amplifier; contact-programming mask ROM; high-speed cascode sensing scheme; low-voltage mask ROM; single end sensing scheme; Capacitance; Circuits; Delay; Digital signal processing; Inverters; Laboratories; Low voltage; Neodymium; Read only memory; Switches;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Circuits, 1999. Digest of Technical Papers. 1999 Symposium on
Conference_Location :
Kyoto, Japan
Print_ISBN :
4-930813-95-6
Type :
conf
DOI :
10.1109/VLSIC.1999.797248
Filename :
797248
Link To Document :
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