DocumentCode :
3218735
Title :
Design methodology for a reduced complexity single quantizer digital delta-sigma modulator
Author :
Ye, Zhipeng ; Kennedy, Michael Peter
Author_Institution :
Dept. of Microelectron. Eng., Univ. Coll. Cork, Cork, Ireland
fYear :
2008
fDate :
14-17 Dec. 2008
Firstpage :
48
Lastpage :
51
Abstract :
Digital delta-sigma modulators (DDSMs) usually belong to one of two classes called multi-stage noise shaping (MASH) DDSMs and single-quantizer (SQ) DDSMs. A reduced complexity (RC) MASH DDSM was proposed and its design methodology was presented. In this paper, we apply a similar design strategy to the SQ-DDSM. We show that the RC SQ-DDSM can achieve similar performance but with nearly 20% less hardware compared with the conventional SQ DDSM, when designed with our methodology.
Keywords :
delta-sigma modulation; quantisation (signal); digital delta-sigma modulator; multistage noise shaping; reduced complexity; single quantizer; Delta-sigma modulation; Design methodology; Feedback; Filters; Finite wordlength effects; Microelectronics; Multi-stage noise shaping; Noise shaping; Quantization; Transfer functions;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronics, 2008. ICM 2008. International Conference on
Conference_Location :
Sharjah
Print_ISBN :
978-1-4244-2369-9
Electronic_ISBN :
978-1-4244-2370-5
Type :
conf
DOI :
10.1109/ICM.2008.5393776
Filename :
5393776
Link To Document :
بازگشت