DocumentCode
3219486
Title
Performance and architectural features of segmented multiple bus system
Author
Kim, Jungioon ; El-Amawy, A.
Author_Institution
Access Network Lab., Korea Telecom, South Korea
fYear
1999
fDate
1999
Firstpage
154
Lastpage
161
Abstract
The paper introduces a new class of bus-based systems called the Segmented Multiple Bus System (SMBS). The SMBS overcomes the architectural limitations of bus-based shared memory systems while maintaining their advantages in terms of high degree of fault tolerance, ease of expansion and ease of programming. In addition SMBSs are scalable; unlike conventional MBSs. Another interesting feature of the SMBS is that it supports wormhole routing which is traditionally used in direct network topologies. Using approximate mean value analysis, we evaluate performance in terms of processing efficiency and request response time. We show good scalability for the SMBS. The approach we adopt in developing the models is comprehensive in the sense that the models incorporate features of both direct and indirect networks. This makes our performance models easily adaptable to several other network topologies
Keywords
fault tolerant computing; multiprocessor interconnection networks; performance evaluation; shared memory systems; approximate mean value analysis; architectural features; architectural limitations; bus-based systems; ease of programming; scalability; segmented multiple bus system; shared memory systems; wormhole routing; Delay; Fault tolerant systems; Network topology; Performance analysis; Routing; Scalability;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel Processing, 1999. Proceedings. 1999 International Conference on
Conference_Location
Aizu-Wakamatsu City
ISSN
0190-3918
Print_ISBN
0-7695-0350-0
Type
conf
DOI
10.1109/ICPP.1999.797400
Filename
797400
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