DocumentCode
3220489
Title
Model Identification for WCET Analysis
Author
Lisper, Björn ; Santos, Marcelo
Author_Institution
Sch. of Innovation, Design, & Eng., Malardalen Univ., Vasteras
fYear
2009
fDate
13-16 April 2009
Firstpage
55
Lastpage
64
Abstract
Worst-Case Execution Time (WCET) analysis derives upper bounds for the execution times of programs. Such bounds are crucial when designing and verifying real-time systems. Static WCET analysis derives safe upper bounds. For complex hardware architectures the hardware modelling is still a challenge, leading to long analysis times and a risk of large WCET overestimation. Therefore, hybrid WCET analysis methods have appeared, where measurements are used to augment or replace the detailed low-level static WCET analysis. These methods do not in general yield a safe WCET estimate, but can still be appropriate in soft real-time systems where such WCET estimates are not crucial. In this paper we make two contributions. First, we develop a hybrid WCET analysis method, which uses regression to identify parameters in the common linear Implicit Path Enumeration Technique (IPET) model for WCET calculation. The method can use timing measurements of different granularity, including end-to-end measurements, which reduces the need for fine-grained timing measurement instrumentation. It uses a novel kind of regression, which guarantees that the identified model does not underestimate any observed execution times. Second, we initiate the development of an IPET-based theory for hybrid WCET analysis test coverage, and we formulate and prove a coverage criterion for the tests needed to identify a safe model.
Keywords
computer architecture; program verification; regression analysis; systems analysis; WCET analysis; complex hardware architectures; end-to-end measurements; implicit path enumeration technique; model identification; real-time systems; regression method; timing measurements; worst-case execution time analysis; Hardware; Information analysis; Instruments; Performance analysis; Real time systems; Technological innovation; Testing; Timing; Upper bound; Yield estimation; WCET analysis; model identification; real-time; test coverage;
fLanguage
English
Publisher
ieee
Conference_Titel
Real-Time and Embedded Technology and Applications Symposium, 2009. RTAS 2009. 15th IEEE
Conference_Location
San Francisco, CA
ISSN
1545-3421
Print_ISBN
978-0-7695-3636-1
Type
conf
DOI
10.1109/RTAS.2009.16
Filename
4840567
Link To Document