DocumentCode
3220570
Title
DC Analysis of Layer by Layer Devices Fabricated by Nanotechnology
Author
Jafri, S.H.M. ; Dutta, J.
Author_Institution
Univ. Coll. of Eng. & Technol. Mirpur A-K, Mirpur
fYear
2007
fDate
11-12 April 2007
Firstpage
1
Lastpage
6
Abstract
Fabrication strategies of nest generation electronic devices, that rely on mechanisms of self-assembly are now widely being recognized as inevitable tools in nanotechnology. Self-organized construction of advanced materials and devices has been carried out starting with tailor made colloidal nanoparticles as building blocks. The LBL thin films were constructed with Manganese doped or un-doped ZnS nanoparticles capped with a polyelectrolyte such as chitosan, and gold nanoparticles stabilized by electrostatic charge. Devices (greater than SO Layers) exhibited characteristics which initially Mock the current with applied voltage followed by a conduction of electrons, the onset of which depended on the thickness of the multilayer stack. In this report, we will be presenting the growth of layer upon multiple deposition process, the surface morphology, and the I-V characteristics of the LBL films and its characteristics repetition.
Keywords
composite materials; multilayers; nanotechnology; self-assembly; thin films; zinc compounds; DC analysis; LBL thin films; ZnS; layer-by-layer device; nanotechnology; polyelectrolyte; self-assembly; Building materials; Electrostatics; Fabrication; Gold; Manganese; Nanoparticles; Nanotechnology; Self-assembly; Transistors; Zinc compounds;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Engineering, 2007. ICEE '07. International Conference on
Conference_Location
Lahore
Print_ISBN
1-4244-0893-8
Electronic_ISBN
1-4244-0893-8
Type
conf
DOI
10.1109/ICEE.2007.4287323
Filename
4287323
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